flashinfer.fused_moe.interleave_cute_dsl_moe_weights

flashinfer.fused_moe.interleave_cute_dsl_moe_weights(weight: Tensor, block_scales: Tensor, swap_ab: bool = False) → Tuple[Tensor, Tensor]

Interleave gated FC1 weights and row-major scales for split CuTe DSL MoE.

Inputs have shape [experts, 2 * intermediate_size, packed_k] and [experts, 2 * intermediate_size, scale_k], with contiguous [up, gate] halves. swap_ab must match the execution API: False uses 64-row groups; True uses 16-row groups for SM100/SM103. CPU and CUDA tensors are supported. Use this before scale swizzling and MMA-layout conversion, once per checkpoint load.

Returns tensors with the same shapes and dtypes. This only permutes rows; it does not requantize weights or change global/input scales. It applies to gated FC1 in W4A4, W4A8, W4A16 and MXFP8 modes, not FC2 or non-gated FC1.

Parameters:

  • weight (torch.Tensor) – Expert weights with contiguous [up, gate] halves.

  • block_scales (torch.Tensor) – Corresponding row-major block scales on the same device as weight.

  • swap_ab (bool) – Use the 16-row swap-AB layout instead of the original 64-row layout.